Provision ISR PTG-01 Dokumentacja Pobierz pdf (Strona 100)

PIC16F7X

DS30325B-page 98  2002 Microchip Technology Inc.

FIGURE 12-7: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED TO VDD): CASE 1

FIGURE 12-8: TIME-OUT SEQUENCE ON POWER-UP (MCLR

NOT TIED TO VDD): CASE 2

FIGURE 12-9: SLOW RISE TIME (MCLR

TIED TO VDD THROUGH RC NETWORK)

TPWRT

TOST

VDD

MCLR

INTERNAL POR

PWRT TIME-OUT

OST TIME-OUT

INTERNAL RESET

VDD

MCLR

INTERNAL POR

PWRT TIME-OUT

OST TIME-OUT

INTERNAL RESET

TPWRT

TOST

VDD

MCLR

INTERNAL POR

PWRT TIME-OUT

OST TIME-OUT

INTERNAL RESET

0V

1V

5V

T

PWRT

TOST

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